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hardware Swiki

Development

These are projects meant to produce saleable products in a reasonably short time frame.

An album includes the most interesting pictures and drawings which show the history of Merlin Hardware.

PlurionĀ® X6 Low Cost Computer

This will be the first machine released, and is just a small box to which you connect a USB keyboard and mouse and a SVGA monitor or TV set. It is based on the Xilinx Spartan 3 1000 programmable chip (FPGA - check out our Avnet/Xilinx corner for FPGA related information) and a Secure Digital card for mass storage. The main memory is a regular 184 pin DDR SDRAM board (128MB to 1GB).

PlurionĀ® V6 Video Game

This is a variation of the desktop X6 which includes a built-in DVD reader (and the FPGA can be programmed from the CD/DVD) and is normally connected to a TV set. USB game controllers can be used in place of the keyboard and mouse.

PlurionĀ® Z6 Hand Held Computer

Using a 7" LCD screen and chorded keyboard, this device uses the same board as the Z6 machines.

The letter indicates the form factor of the machine: X = experimental (just the board in a box), Z = screen (in honor of the ZX and Z machines from Sinclair). The number is the generation of the board design (which is 6 in honor of the Merlin 1 to 5 machines).

License

All information needed to build these machines (schematics, PCB layouts, FPGA programming files, all special CAD tools) will be available under an open source style license. This will allow teachers, students and interested people to learn about the system at the deepest level and also to modify it if they want.

The very latest version will only be available to companies that are paying to produce Merlin computers. As soon as they get a new version, the previous one will be released to the general public.

Processor Designs

The reason why the heart of these computers is a programmable chip is so a custom processor can be designed to perfectly match the intended application. Several alternatives have been designed so far.

Plurion Architecture

The idea is that it is easier to develop software that runs on a number of simple stack processors and on a single VLIW processor due to the complexity of statically scheduling instructions to make full use of the hardware. A very important feature is the PICMode scheme for implementing message dispatch. The current description shows a stack architecture based core, but the plan is to use RISC42 instead.

RISC42

This is a cleaned up version of the third design shown in the Other designs page. It is a nice architecture for running code compiled from C or even written in assembly language.

Research

These projects were created to gain more knowledge which could improve the projects described in the development section above. They will not directly result in products, though that might change if a project ever moves to the development phase.

RNA (Ring Network Architecture)

Is it possible to implement Smalltalk directly in hardware, ignoring the traditional Von Neumann machine separations of processing and memory?

Computer in a Pen

Could a usable $5 computer be built with today's technology?

Hardware Recompilation

This is a hardware alternative to the Self/Strongtalk style software adaptive compilation technology.

Retrocomputing

"Of all the words of tongue and pen, the saddest are these - it might have been." But rather than agree with this, I like to consider what was and what could have been. Thinking about and actually building or rebuilding machines from the actual or possible past is the hobby of "retrocomputing" or (in the case of things the could have been built but for some reason never were) "alternative retrocomputing".

A list of known Smalltalk Computers is a good way to see what once was, and a list of FPGA retrocomputing projects shows a modern way of recreating old stuff.

K72

This is a retro-computing project to see how good a Dynabook it would have been possible to implement in the early 1970s.

Older versions and variations

Another site has more information about the initial years of the project.

Merlin Junior was a low cost version of the Merlin 6 using the Spartan 2e. It was essentially a cleaned up version of proto-Merlin, which was an adaptation of the Oliver boards for a demonstration as a low cost Smalltalk computer.

The older Pegasus 2000 project generated many interesting ideas that are being resused here.

Information about a previous Merlin 6 design with PCMCIA sized modules that plugged into a main chassis:

The next Merlin 6 was to be built from a set of standard modules. The mechanical specifications explain the meaning of the size codes used in the table below while the o network page details the interconnection between modules.

module size description
Tablet 3B/5B includes a 6.4/8.4 inch LCD display with a touch sensitive screen. A compact flash (CF) card stores the system software, programming for the FPGA and user data so that replacing the card will completely customize the machine for a given user.
Compute Node 3A can be connected to a monitor or TV
Storage Node 3B this is a complete file server built around a single 3.5 inch hard disk
Optical Storage 5C can be a CD-ROM, CD-RW or DVD drive
Power Source 3B generates the 48V used by the other modules

For very small configurations, the Power Source module could be replaced with a wall transformer. Either sized Tablet or a Compute Node could be a full system all by itself, but in that case storage would be limited to a single CF card.

A separate disk board was used in early versions, but a later plan was to use a single, generic main board for all modules.

Processor Designs

Oliver implements a 16 bit processor to run Neo Smalltalk

It was inspired by the Forth MISC designs. Two pages in Portuguese describe the early testing of the PCB and the development of the FPGA programming and software. They include some pictures.

I/O Processor

The same stack processor that execute user code can also be used to implement i/o functions in software, but a simple RISC variation might be better for this job.

SqueakProcessor is a hardware implementation of Squeak Smalltalk

It uses a microcoded architecture and a "dual image" scheme to move most of the complex functions into the software layer. Note that a RISC processor enhanced with a PICMode and a BCMode execution extensions would have a performance similar to this special microcoded design and so could be a more interesting product.

Tachyon

The initial design for the Merlin 6 was based on the Tachyon processor.

dietST

This was a 16 bit design implemented in a 4 bit serial fashion is an attempt to find out the answer to "How small can a processor be and still execute Smalltalk directly in a usable way?" The goal was to fit a complete Smalltalk computer in an FPGA with only 15 thousand gates. Since the Plurion Architecture can now be configured to have a partially serial operation, a special design is no longer needed.

CBC

The C ByteCode architecture is a virtual machine to compactly encode programs written in the C programming language.

Other

Here are a few variations based on the design for the I/O Processor

Educational Processors

This is a list of processors designed for teaching computer architecture concepts.