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Processor Module
Every Merlin 6 computer must have at least one processor module, though any practical configuration will require at least two.
A processor module can be connected to a single IO module. In addition, it can connect to up to two other processor modules via a high speed ring network forming a distributed memory parallel computer which is very scalable.
Each board will be around 8 x 8 cm. I am still deciding which connectors to use for the cpu-i/o and cpu-cpu applications.
The processor is built using a Xilinx Spartan 2 XC2S150 chip, and is connected to three 64K by 32 ZBT SRAM chips for its cache and four 16M by 16 SDRAM chips for its main memory.
The configuration described above would have a 64K by 96 bit cache. 64 bits are for data, which 32 are for the tag. The first half of the cache is for compiled MOVE instructions, the third fourth is for the dynamic compiler itself while the last fourth is the data cache. I am looking at the cost of using larger SRAMs since 128Kbytes is a rather small space in which to fit the compiler, specially given that the MOVE instructions aren't too compact.
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